Micrel
MICRF405
April 2006
8
M9999-041906
(408) 955-1690
Programming Interface Timing
Figure 1 and Table 2 shows the timing specification
for the 3-wire serial programming interface.
Figure 1. Programming Interface Timing.
Values
Symbol
Parameter
Min.
Typ.
Max.
Units
Tper
Min. period of SCK
50
ns
Thigh
Min. high time of SCK
20
ns
Tlow
Min. low time of SCK
20
ns
Tfall
Max. time of falling edge of SCK
1
祍
Trise
Max. time of rising edge of SCK
1
祍
Tsenf
Min. time of falling edge of SEN to falling edge of SCK
0
ns
Tsenr
Min. delay from rising edge of SEN to rising edge of SCK
5
ns
Twrite
Min. delay from valid SIO to falling edge of SCK during a
write operation
0
ns
Tread
Min. delay from rising edge of SCK to valid SIO during a read
operation (assuming load capacitance of SIO is 25pF)
75
ns
Trdy
Min. delay from falling edge of SCK (last bit of byte into data
buffer) to falling edge of RDY
20
ns
Thigh
Min. duration of a SEN high pulse
(Fphd is the phase detector frequency)
1/Fphd
Time from power up to first falling edge of SEN
3.5
ms
Table 2. Timing Specification for the 3-wire Programming Interface.
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